perf c2c 功能缺失 无法看到缓存不一致对应的代码行

## 环境信息 【OS版本】openeuler-22.03-LTS-SP4 【内核版本】 5.10.0-216.0.0.115.kb3.ky3_5.x86_64 【硬件平台】鲲鹏920和鲲鹏920b 【组网信息】（和网络、性能相关的问题，应该说明详细的组网和场景信息） ## 缺陷信息 【问题复现步骤】`gcc -o c2c false_sharing.c -lpthread -lnuma perf c2c record ./c2c 8 perf c2c report --stdio perf spe-c2c record ./c2c 8 perf spe-c2c report --stdio 【实际结果】    【期望结果】 可以显示出对应缓存不一致的代码行以及对应的占比 false_sharing.c代码 ` #define _MULTI_THREADED #define _GNU_SOURCE #include <stdio.h> #include <string.h> #include <stdlib.h> #include <stdint.h> #include <unistd.h> #include <sched.h> #include <pthread.h> #include <numa.h> #include <sys/types.h> /* * A thread on each numa node seems to provoke cache misses */ #define LOOP_CNT (5 * 1024 * 1024) #if defined(__x86_64__) || defined(__i386__) static __inline__ uint64_t rdtsc() { unsigned hi, lo; __asm__ __volatile__ ( "rdtsc" : "=a"(lo), "=d"(hi)); return ( (uint64_t)lo) | ( ((uint64_t)hi) << 32); } #elif defined(__aarch64__) static __inline__ uint64_t rdtsc(void) { uint64_t val; /* * According to ARM DDI 0487F.c, from Armv8.0 to Armv8.5 inclusive, the * system counter is at least 56 bits wide; from Armv8.6, the counter * must be 64 bits wide. So the system counter could be less than 64 * bits wide and it is attributed with the flag 'cap_user_time_short' * is true. */ asm volatile("mrs %0, cntvct_el0" : "=r" (val)); return val; } #endif /* * Create a struct where reader fields share a cacheline with the hot lock field. * Compiling with -DNO_FALSE_SHARING inserts padding to avoid that sharing. */ typedef struct _buf { long lock0; long lock1; long reserved1; #if defined(NO_FALSE_SHARING) l…